Technical Program Manager, Hardware Systems na Anthropic

Híbrido - San Francisco, CA, United States

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Anthropic’s mission is to create reliable, interpretable, and steerable AI systems. The role builds custom hardware systems that support large accelerator fleets, overseeing everything from concept through production deployment. Responsibilities include program planning, vendor coordination, NPI cadence management, validation, and cross‑functional interface ownership, with a focus on high‑performance hardware, reliability, and AI‑assisted program management.

Salary

USD 365,000 - 435,000

Requirements

Skills

  • 8+ years in hardware systems / NPI program management for compute, networking, storage, or accelerator platforms
  • Direct ownership of at least one platform from concept through volume production
  • Working technical fluency across the hardware stack – power delivery, thermal, mechanical, high‑speed interconnect, board design, system management
  • Experience managing ODMs/CMs and component vendors, including SOW negotiation, build tracking, quality escapes, and escalation
  • Track record of standing up program mechanisms on a new or early‑stage hardware effort
  • Strong written communication – plans, reviews, and exec updates
  • Comfort operating with high autonomy and limited process in a fast‑moving, ambiguous environment
  • BS/MS in EE, CE, ME, or a related field, or equivalent experience
  • Experience with AI/ML accelerator systems (GPU, TPU, custom ASIC), HPC, or hyperscale datacenter platforms
  • Experience taking a first‑generation, custom‑silicon‑based system from bring‑up through fleet deployment
  • Experience with liquid‑cooled and/or high‑density rack architectures, rack level high power distribution, or optical interconnect programs
  • Familiarity with the chip‑package‑system interface and coordinating tightly with a silicon team
  • Experience with datacenter integration, deployment, and fleet‑scale reliability/RAS programs
  • Practical experience using AI tools in your own workflow

Responsibilities

  • Own the integrated hardware systems program plan across board, chassis, rack, and interconnect – from requirements through EVT/DVT/PVT, qualification, and production ramp – and be the source of truth on schedule, risk, and readiness
  • Drive execution with ODMs, contract manufacturers, and component/optics vendors: SOWs, build schedules, deliverable tracking, factory readiness, and escalation when they slip
  • Stand up and run the NPI cadence – build matrix, engineering reviews, DFx, issue triage, exit criteria – and keep it lightweight enough that a small, senior team actually uses it
  • Drive the bring‑up and validation program for new platforms: lab and pilot‑rack logistics, firmware/BMC/diagnostics coordination, test coverage, and the reliability and telemetry targets a platform has to hit before it enters the fleet
  • Own the interfaces that make or break a hardware program: silicon (samples, package, power/thermal envelopes), datacenter (power, cooling, rack integration, deployment windows), infrastructure software (management plane, provisioning, telemetry), and supply chain (long‑lead components, second‑sourcing, allocation)
  • Run partner and technology evaluations as a program – candidate ODMs, reference platforms, connector/optics/memory options – and land build / buy / co‑design recommendations with the architecture team
  • Own program communication upward and outward – for an audience that ranges from architects to executives
  • Develop and share AI‑assisted approaches to hardware program management – issue‑tracker synthesis, build‑readiness checking, spec/BOM consistency, ODM‑report digestion

Technologies

GPUTPUCustom ASICHigh‑speed interconnectBoard designFirmwareBMCDiagnosticsInfrastructure softwareDatacenter integrationAI tools

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